Targeted for use in a variety of consumer products including cell phones, the device has multiple power domains and tight area requirements.

With its ability to concurrently address critical design considerations including power, timing and area, the Magma software enabled u-Nav to achieve a 22 percent power reduction while reducing die size.

In addition, u-Nav utilized Magma's built-in extraction engine for design sign-off. This integrated flow allowed u-Nav to make changes and turnaround the design in less than a day, significantly reducing the design cycle.

"As the complexity of our GPS solutions increases, power management and optimization become critical," said Pete Maimone, u-Nav vice president of Product Development.

"This design had three power domains. If we had used a point-tool flow we would have had to handle them hierarchically. The Magma system enabled a virtually flat multi-Vdd methodology in which power was optimized within and across each domain. Magma's integrated approach, advanced technology and committed application engineers were all critical to our design success."

"Creating optimal low-power designs requires the ability to make accurate and efficient tradeoffs such as timing-versus-power and area-versus-power at different stages of the design flow," said Premal Buch, general manager of Magma's Design Implementation Business Unit. "We're pleased that u-Nav was able to leverage Magma's low-power design methodology for this important design."

Advanced Low-Power Design Techniques Integrated with Implementation

With Blast Power as part of the Magma implementation flow, designers have a comprehensive low-power design methodology. Early in the design flow Blast Power enables dynamic power reduction by recognizing special directives in the RTL to insert power gating cells and retention flops. Blast Power also supports architectural optimization to select the right architecture to minimize power, based on the power constraints.

By using multiple variable threshold voltage (multi-Vt) libraries, Blast Power maximizes leakage power reduction. Multi-threshold CMOS (MTCMOS) switches are used to connect the global constant power rails to the local switched power rails. These switches effectively allow certain blocks in the design to be powered off depending on the mode of operation of the chip, thereby significantly reducing leakage power.

For designs that have different voltage islands, Blast Power can optimize within each voltage domain using the appropriate cells. It also enables voltage versus frequency scaling to perform timing and power analysis for different operating conditions. To further accelerate the design cycle Blast Power includes automatic power-grid synthesis, enabling designers to automatically generate power grids based on specified constraints.

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