The RT54SX32S and RT54SX72S parts will be used for many flight-critical functions on the space explorations, including interfacing and control, co-processing and data handling, as well as mission-critical functions within various scientific instruments.

Actel's RTSX-S FPGAs were also chosen by Systems Engineering & Assessment Ltd. (SEA) of Bath, United Kingdom, for SEA's cooler drive processor, which requires resistance to single-event upsets (SEUs) and tolerance to total ionizing dose (TID). Incorporated in the high-frequency instrument (HFI) on the Planck space probe, the circuit maintains the radiation measuring and cooling equipment at a constant temperature of -269 degrees Celsius.

Alan Senior, principal consultant at SEA, commented, "Because we could not risk any upsets to the cooler drive processor, the Actel RT54SX32S FPGAs met our requirements exactly and the required TID performance was easily achieved.

"Further, the device's SEU-hardened flip-flops were vital for storing important status and control bits in the system. In addition, we had to make some late adjustments to the FPGA design and I/O definition, and we were confident that the Actel part would re-route easily, preventing the need for a printed circuit board re-spin."

"Shipping to European space programs since early 2001, the RTSX-S FPGAs have received remarkable acceptance. Further, with more than 200 Actel devices onboard, the Herschel and Planck missions mark the largest ever use of Actel FPGAs on a European space program," explained Joe Wells, aerospace business development manager, Actel Europe.

"We believe these designs are the result of our commitment to be a key player in space technology and we hope the addition of the recently announced high-density RTAX-S family to our space offerings will enable future design successes and breakthroughs in space."

The RTSX-S Family
The RTSX-S family ranges in density from 32,000 to 72,000 typical gates (16,000 to 36,000 equivalent ASIC gates) and offers system performance in excess of 250 MHz. Actel's RTSX-S family is the industry's first FPGA solution built on a foundation of hardened latches, which eliminates the need for triple-module redundancy (TMR).

Traditional FPGAs, which do not use hardened latches, force the user to implement TMR using software or a large portion of the device's programmable logic. This process of majority voting, or redundancy, means that up to two-thirds of the density, or available logic, is consumed for redundancy and isn't available for the user's design.

The RTAX-S Family
With densities up to 2-million equivalent system gates (approximately 250,000 ASIC equivalent gates), the space-optimized, single-chip RTAX-S devices provide inherent single-event latchup (SEL) immunity; >37MeV-cm2/mg SEU capability; and total ionizing dose (TID) performance in excess of 200 Krads.

The recently announced family also features embedded RAM with an upset rate of <1E-10 errors/bit-day with error detection and correction (EDAC). These features position the RTAX-S family, which is based on the AX architecture and scalable platform, as the only viable radiation-tolerant alternative to application-specific integrated circuits (ASICs) that meets the density, performance and radiation-resistance requirements of many satellite applications.

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