The addition of the new lower density RTAX250S FPGA further enables Actel to provide access to all of the advantages of the RTAX-S solutions, including on-board memory, practical single-event upset (SEU) immunity, and an expanded set of I/O standards, to those space designers with moderate logic requirements.

Combined with proven reliability at extreme temperatures and live at power-up functionality on a single chip, the product's advantages will enable the RTAX250S device, a radiation-tolerant alternative to application- specific integrated circuits (ASICs), to meet the density, performance and radiation-resistance requirements of many satellite bus and payload applications, such as command and data handling, attitude and orbit control, and management of spacecraft power and environmental controls.

"As a committed supplier of high-reliability products for the space community, we have been very pleased with the overwhelming interest in the RTAX-S FPGA family.

"Its unique feature set, such as SEU-hardened flip-flops and usable error-corrected on-board memory, combined with the inherent benefits of our nonvolatile products, gives designers the ability to reduce component count, minimize power consumption and save board space and weight while meeting their density, performance and radiation-resistance requirements," said Ken O'Neill, director, military and aerospace product marketing at Actel.

"Further, with the new RTAX250S, we are able to extend the RTAX-S feature set to a smaller FPGA so that designers who need only a modest amount of logic can take advantage of the benefits of the family."

The RTAX-S devices offer inherent single-event latch-up (SEL) immunity; immunity to SEUs with an NLET threshold far greater than 37MeV-cm2/mg; and total ionizing dose (TID) performance in the region of 300 Krads.

The family also features embedded RAM with an upset rate of <1E-10 errors/bit-day with error detection and correction (EDAC). With 250,000 system gates, or 30,000 ASIC-equivalent gates, the RTAX250S contains support for up to 54k bits of embedded SRAM, 248 user I/Os and 1,408 SEU-hardened registers.

To enable board-level functional verification and simulation of production-qualified solutions, Actel offers RTAX250S prototyping capability via pin-compatible, commercial Axcelerator FPGAs.

Actel's RTAX-S prototyping solution includes software support for EDAC intellectual property, which mitigates SEUs in the user memory. Application notes explaining how to design RTAX-S based applications using Axcelerator devices are available from Actel.

The RTAX-S family is supported by the Actel Libero integrated design environment and Actel Designer tool suite, which includes place and route, timing analysis and memory generation functionality. Additional support for the family is provided by industry-leading third-party tools from Model Technology, Mentor Graphics, Synplicity, Cadence Design Systems and Synopsys.

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